Re: [Jack-Devel] jackd2 bus error on openwrt

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DateTue, 18 Aug 2015 17:19:47 +1000
From Matt Flax <[hidden] at flatmax dot org>
ToAdrian Knoth <[hidden] at drcomp dot erfurt dot thur dot de>
CcJack devel <[hidden] at lists dot jackaudio dot org>
In-Reply-ToAdrian Knoth Re: [Jack-Devel] jackd2 bus error on openwrt
Follow-UpJeremy Jongepier Re: [Jack-Devel] jackd2 bus error on openwrt
Follow-UpAdrian Knoth Re: [Jack-Devel] jackd2 bus error on openwrt
I have found that on this embedded platform, they don't define __arm__ 
they define __mips__ below is the output from /proc/cpuinfo.

I have a patch for jack1, however I am not sure that packing is the 
problem ... how can I tell ?

I have tried clearing the packing definition with jackd 2 and I still 
get "bus error".

What I do find however is that when I start jackd and then netjack one I 
can't get any I2S signal. When I use aplay on the device I do get I2S 
audio signal. Is there a way to put signal through jack on the device ?
Here are the available jack commands on the device :
jack_alias           jack_load            jack_samplerate
jack_bufsize         jack_load_test       jack_session_notify
jack_connect         jack_lsp             jack_thread_wait
jack_disconnect      jack_midi_dump       jack_transport
jack_evmon           jack_monitor_client  jack_unload
jack_freewheel       jack_netsource       jack_wait
jack_iodelay         jack_property        jackd

thanks
Matt


.... begin cat /proc/cpuinfo ....

system type        : Atheros AR9330 rev 1
processor        : 0
cpu model        : MIPS 24Kc V7.4
BogoMIPS        : 265.42
wait instruction    : yes
microsecond timers    : yes
tlb_entries        : 16
extra interrupt vector    : yes
hardware watchpoint    : yes, count: 4, address/irw mask: [0x0ffc, 
0x0ffc, 0x0ffb, 0x0ffb]
isa            : mips1 mips2 mips32r1 mips32r2
ASEs implemented    : mips16
shadow register sets    : 1
kscratch registers    : 0
package            : 0
core            : 0
VCED exceptions        : not available
VCEI exceptions        : not available


On 16/08/15 21:10, Adrian Knoth wrote:
> On Sun, Aug 16, 2015 at 09:40:18AM +1000, Matt Flax wrote:
>
> Hi!
>
>> I am revisiting running jackd2 on openwrt using another ARM
>> architecture. It is compiled from git commit
>> cd59d67847afb57393a1db6d39badd94a4973f6e
>>
>> When jack starts I still get bus error :
>> root@OpenWrt:/# jackd -v -d alsa
>> jackdmp 1.9.11
>> Bus error
>>
>> Not sure what to do next to debug, beyond hacking console outputs
>> into the command line.
> You are most likely dealing with unaligned memory access here, usually
> mis-aligned structs. I'm somewhat surprised that it didn't surface on
> other ARM platforms before, but then again, there are many variations of
> "ARM".
>
> Further reading:
>
>     https://www.kernel.org/doc/Documentation/arm/mem_alignment
>
> specifically:
>
>     echo 1 > /proc/sys/debug/alignment
>
> and then check the syslog.
>
> If this confirms that it's unaligned access, you know what to look for.
>
> A good and comprehensive read:
>
>     http://www.catb.org/esr/structure-packing/
>
> Maybe "pahole" in the tools section can be of further help, but let's
> not jump to conclusions.
>
> I've only skimmed the following link, but it also seems like a good
> introduction to memory alignment:
>
>     https://lwn.net/Articles/259732/
>
> In other words: set aside half a day for hunting this down.
>
> Last not least: ARM behaviour may be different depending on the compiler
> flags. I vaguely recall different CPU targets behaving differently. I
> assume you used the correct flags that match your platform, endianess
> etc.
>
>
>
> Cheers
>

#define __DBL_MIN_EXP__ (-1021)
#define __HQ_FBIT__ 15
#define __UINT_LEAST16_MAX__ 65535
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#define __INTMAX_C(c) c ## LL
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#define R3000 1
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#define __WCHAR_MAX__ 2147483647
#define __LACCUM_IBIT__ 32
#define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1 1
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#define __DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)
#define __GCC_ATOMIC_CHAR_LOCK_FREE 2
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#define __mips_abicalls 1
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#define linux 1
#define __UTA_IBIT__ 64
#define _MIPS_SZINT 32
#define __LDBL_MANT_DIG__ 53
#define __SFRACT_FBIT__ 7
#define __SACCUM_MIN__ (-0X1P7HK-0X1P7HK)
#define __DBL_HAS_QUIET_NAN__ 1
#define __MIPSEB 1
#define __SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1)
#define __INTPTR_TYPE__ int
#define __UINT16_TYPE__ short unsigned int
#define __WCHAR_TYPE__ int
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#define __GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1
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#define __USACCUM_MIN__ 0.0UHK
#define __UHA_IBIT__ 8
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#define __UTQ_IBIT__ 0
#define _MIPS_SIM _ABIO32
#define __DBL_MANT_DIG__ 53
#define __INT_LEAST64_MAX__ 9223372036854775807LL
#define __GCC_ATOMIC_CHAR16_T_LOCK_FREE 2
#define __DEC64_MIN__ 1E-383DD
#define __WINT_TYPE__ unsigned int
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#define __SIZEOF_SHORT__ 2
#define __ULLFRACT_IBIT__ 0
#define __LDBL_MIN_EXP__ (-1021)
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#define __UDA_IBIT__ 32
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#define __LDBL_MAX_10_EXP__ 308
#define __ATOMIC_RELAXED 0
#define __DBL_EPSILON__ ((double)2.2204460492503131e-16L)
#define __UINT8_C(c) c
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#define __TQ_FBIT__ 127
#define __INT_FAST8_TYPE__ signed char
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#define __UHQ_IBIT__ 0
#define __LLACCUM_IBIT__ 32
#define __DBL_DECIMAL_DIG__ 17
#define __DEC_EVAL_METHOD__ 2
#define __TA_FBIT__ 63
#define __mips_soft_float 1
#define __UDQ_IBIT__ 0
#define __ORDER_BIG_ENDIAN__ 4321
#define __ACCUM_EPSILON__ 0x1P-15K
#define __UINT32_C(c) c ## U
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#define __LLFRACT_IBIT__ 0
#define __INT8_MAX__ 127
#define __UINT_FAST32_TYPE__ unsigned int
#define __CHAR32_TYPE__ unsigned int
#define __FLT_MAX__ 3.4028234663852886e+38F
#define LANGUAGE_C 1
#define __USACCUM_FBIT__ 8
#define __INT32_TYPE__ int
#define __SIZEOF_DOUBLE__ 8
#define __FLT_MIN_10_EXP__ (-37)
#define __UFRACT_EPSILON__ 0x1P-16UR
#define __INTMAX_TYPE__ long long int
#define _LANGUAGE_C 1
#define __DEC128_MAX_EXP__ 6145
#define __ATOMIC_CONSUME 1
#define __GNUC_MINOR__ 8
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#define __DEC32_MANT_DIG__ 7
#define __HA_FBIT__ 7
#define __DBL_MAX_10_EXP__ 308
#define __LDBL_DENORM_MIN__ 4.9406564584124654e-324L
#define __INT16_C(c) c
#define __STDC__ 1
#define __PTRDIFF_TYPE__ int
#define __LLFRACT_MIN__ (-0.5LLR-0.5LLR)
#define __mips 1
#define __ATOMIC_SEQ_CST 5
#define __DA_FBIT__ 31
#define __UINT32_TYPE__ unsigned int
#define _MIPS_SZLONG 32
#define __UINTPTR_TYPE__ unsigned int
#define __USA_IBIT__ 16
#define __DEC64_SUBNORMAL_MIN__ 0.000000000000001E-383DD
#define __DEC128_MANT_DIG__ 34
#define __LDBL_MIN_10_EXP__ (-307)
#define __SIZEOF_LONG_LONG__ 8
#define __ULACCUM_EPSILON__ 0x1P-32ULK
#define __SACCUM_IBIT__ 8
#define __GCC_ATOMIC_LLONG_LOCK_FREE 1
#define __LDBL_DIG__ 15
#define __FLT_DECIMAL_DIG__ 9
#define __UINT_FAST16_MAX__ 4294967295U
#define __GNUC_GNU_INLINE__ 1
#define __GCC_ATOMIC_SHORT_LOCK_FREE 2
#define __ULLFRACT_MAX__ 0XFFFFFFFFFFFFFFFFP-64ULLR
#define __UINT_FAST8_TYPE__ unsigned char
#define __USFRACT_EPSILON__ 0x1P-8UHR
#define __ULACCUM_FBIT__ 32
#define __QQ_IBIT__ 0
#define __ATOMIC_ACQ_REL 4
#define __ATOMIC_RELEASE 3
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