Re: [Jack-Devel] latency: reducing buffer allocation

Chris,
after some research I found out that the TPS65950 is software and 
functionally equivalent to TWL4030 (except from a minor issue in the 
power management module we don't care).
TWL4030 datasheets cannot be found on the net, but TPS65950 are available.

Among the documents the only one that relates to registers and SW 
programming is the SWCU050, " TPS65950 OMAP™ Power Management and System 
Companion Device ES 1.2 TRM (Rev. G)", which can be downloaded only 
after signing in.

I read it thoroughly but I can't see any useful reference to buffering 
on jack's side. The audio mode (as opposed to the lower quality voice 
mode) uses a TDM interface, documented in paragraph 14.4.4.2 which 
reports about frame formats. I'm wondering if there is any relevant 
buffering on the hardware at all which must be taken care of?

Also took a look at twl4030-related ALSA code but can't find a clue, but 
I'm not an expert on audio drivers.

Regards

Leonardo


On 19/03/2014 17:48, Chris Caudle wrote:
> On Tue, March 18, 2014 12:52 pm, Leonardo Gabrielli wrote:
>> BTW: the chipset is TWL4030
> That is not using the TPS65950 described in the BeagleBoard user manual?
> I was not able to find any documentation on the programming interface for
> the audio output at the location with the electrical datasheets:
> http://www.ti.com/product/tps65950#technicaldocuments
>
> I can't find an equivalent simple link for a TWL4030 chip.  The
> description for TPS65950 looks exactly like the description for TWL4030 in
> the OMAP processor brochure, did TI just change the part number at some
> point?
>
> Either way, what is needed is a register level programming guide for the
> audio codec which would specify the required buffer sizes to work with the
> output device.  That will show what the minimum possible latency with that
> hardware will be.
>

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